产品目录

License for debugging the RISC-V 32-bit architecture via Tessent Embedded Analytics (former UltraSoC) USB Debug for Windows and Linux requires TRACE32 software R.2020.09 The TRACE32 software must be specially adapted from Lauterbach for each chip. Please contact the Lauterbach development departement before ordering. floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the RISC-V 64-bit architecture via Tessent Embedded Analytics (former UltraSoC) USB Debug for Windows and Linux requires TRACE32 software R.2020.09 The TRACE32 software must be specially adapted from Lauterbach for each chip. Please contact the Lauterbach development departement before ordering. floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the Xtensa architecture via Tessent Embedded Analytics (former UltraSoC) USB Debug for Windows and Linux requires TRACE32 software R.2022.02 The TRACE32 software must be specially adapted from Lauterbach for each chip. Please contact the Lauterbach development departement before ordering. floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the Cortex-A/R (Armv8/v9) architecture via "Software Debugging over Arm CoreSight Wire Protocol (CSWP)" Floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ) The TRACE32 software must be specially adapted from Lauterbach for each chip. Please contact the Lauterbach development department before ordering.

TRACE32 Front-End connecting to third-party virtual target/simulators via Synopsys ASIP API. Floating license via RLM (Reprise License Manager). Please add the RLM HostID of the license server to your order. Even just for debugging, you may need an additional license for "Synopsys' ASIP Designer™" (or similar), which can be purchased from Synopsys.

License for debugging the Arm11 architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the Arm9 architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging Armv8 and Armv9 based Cortex-A, Cortex-R, Cortex-X and Neoverse 32/64-bit core via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License to debug cores created with Synopsys' ASIP Designer™ via Generic Transactor Library for Windows and Linux. Floating license via RLM (Reprise License Manager). Requires LA-8913L "Floating License for Synopsys ASIP Front-End". Please add the RLM HostID of the license server to your order.

License for debugging the Cortex-A/R Armv7 architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the Cortex-M architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the HEXAGON architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the IPU via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the MIPS32 architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the RISC-V 32-bit architecture via Generic Transactor Library for Windows and Linux requires TRACE32 software R.2020.09 for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the RISC-V 64-bit architecture via Generic Transactor Library for Windows and Linux requires TRACE32 software R.2020.09 for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the TeakLite4 architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging VSPA architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the Xtensa architecture via Generic Transactor Library for Windows and Linux for RTL emulation or RTL simulation requires that EDA partner supports GTL interface floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

License for debugging the Cortex-A V7 architecture (32-bit) via Tessent Embedded Analytics (former UltraSoC) USB Debug for Windows and Linux requires TRACE32 software R.2020.09 The TRACE32 software must be specially adapted from Lauterbach for each chip. Please contact the Lauterbach development departement before ordering. floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)